Fornero, M., Lingenfelter, D., Litkouhi, S., Oster, K. et al., "Flexible Low Cost Lane Departure Warning System," SAE Technical Paper 2007-01-1736, 2007, doi:10.4271/2007-01-1736.
Author(s):
M. Fornero - University of Michigan
D. Lingenfelter - University of Michigan
S. Litkouhi - University of Michigan
K. Oster - University of Michigan
R. Ong - University of Michigan
Many highway accidents are caused by distracted drivers and those suffering from drowsy driver syndrome. A driver alert indicating a lane departure could thwart such accidents, saving lives and making our roads safer.
Products called Lane Departure Warning Systems (LDWS) have been developed to alert drivers of a lane departure. However, due to their high cost, lane departure warning systems are available only on luxury vehicles, barring their benefits from the majority of drivers. With Field Programmable Gate Arrays (FPGA) becoming more powerful and more affordable, a LDWS implementation utilizing hardware rather than software to conduct image processing eliminates the need for a costly high-power microprocessor, and could bring LDWS to a broader user base.
This paper will discuss an FPGA based approach to LDWS. The proof-of-concept system is based on a Xilinx FPGA, taking its image data from an off-the-shelf NTSC camera. This implementation leverages the massively parallel nature of the FPGA to produce a high performance system that could be developed into a low-cost commercial LDWS.
The proof-of-concept system detected lane departures with a detection accuracy of 74%. With the low cost of FPGA-based designs, lane departure warning systems could become profitable on more automobile models, thus increasing their availability.
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