A Reconfigurable SIMD-MIMD Processor Architecture for Embedded Vision Processing Applications
Date Published: 2009-04-20
Paper Number:2009-01-0159
DOI: 10.4271/2009-01-0159
Citation:
Prengler, A. and Adi, K., "A Reconfigurable SIMD-MIMD Processor Architecture for Embedded Vision Processing Applications," SAE Technical Paper 2009-01-0159, 2009, doi:10.4271/2009-01-0159.
Author(s):
Adam Prengler - NEC Electronics America, Inc
Ketaki Adi - NEC Electronics America, Inc
In designing vision processors for advanced automotive safety applications, the developer must address various issues, including true real-time performance and power efficiency as well as software flexibility to account for various applications, situations and environments.
While parallelization through SIMD (single instruction/ multiple data) architectures has been a proven solution to speed up the initial processing of an image, SIMD processors have limited efficiency for the final image-processing steps that are mainly serialized or require floating-point arithmetic, where a MIMD (multiple instructions/multiple data) architecture would be beneficial.
The paper introduces the architecture of the IMAPCAR-XC® core, a highly parallel processor that incorporates in its design the flexibility to handle all of these requirements efficiently.
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