A Standardized Process Flow for Creating and Maintaining Component Level Hardware in the Loop Simulation Test Bench

Paper #:
  • 2016-01-0052

Published:
  • 2016-04-05
DOI:
  • 10.4271/2016-01-0052
Citation:
Khan, J., "A Standardized Process Flow for Creating and Maintaining Component Level Hardware in the Loop Simulation Test Bench," SAE Technical Paper 2016-01-0052, 2016, https://doi.org/10.4271/2016-01-0052.
Author(s):
Affiliated:
Pages:
7
Abstract:
HILS is a proven and essential part of the embedded product development life cycle which strives to reduce effort, time and cost spent on automotive validation activities. An efficient HILS system allows to create a precise simulation environment for the ECU which is made to believe that it is sitting inside a real vehicle and there by the intended functionalities implemented in the same could be tested even before the vehicle prototypes or other ECUs or sensors and actuators are available. An inefficient and faulty HILS system provides erroneous test results which could lead to wrong inferences. This paper is proposing a standardized process flow aided by specific documentation and design concepts which validates that the test system designed is robust and caters to the actual requirement. The Design stage starts by a requirement gathering phase where the analysis of the device under test is executed in detail. This paper discusses how this is first translated to a high level design of the HIL system. This is followed by a test strategy document design which acts as a handbook that supports the validation services. A requirement specification for the test system is created in the next stage where each test bench requirement is listed. A Low level design document shall bring together practical implementation details based on the previous design documents. The HILS building stage uses the designs exclusively derived from the design stage. The Paper concludes by discussing how this standardized process flow and documentation have proved to enhance the quality and effectiveness of electronic testing devices and procedures.
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