Experimental Hardware-in-the-loop (xHIL) testing utilizing signal and/or power emulation imposes a hard real-time requirement on models of emulated subsystems, directly limiting their fidelity to what can be achieved in real-time on the available computational resources. Most real-time simulators are CPU-based, for which the overhead of an instruction-set architecture imposes a lower limit on the simulation step size, resulting in limited model bandwidth. For power-electronic systems with high-frequency switching, this limit often necessitates using average-value models, significantly reducing fidelity, in order to meet the real-time requirement. An alternative approach emerging recently is to use FPGAs as the computational platform, which, although offering orders-of-magnitudes faster execution due to their parallel architecture, they are more difficult to program and their limited fabric space bounds the size of models that can be simulated. This paper presents a new method for simulating detailed models of power-electronic systems in real-time, targeting simulation platforms that combine both FPGAs and CPUs, but can also be adapted to run on multi-CPU systems. The method creates a multi-rate model by decomposing simulation process into discrete integration and output refinement stages. In the first stage, model equations are solved on the CPU at the fundamental switching rate to obtain the solution at key event points, whereupon the solution is refined in the second stage at a higher rate on the FPGA to the desired bandwidth. The method is applied to the real-time simulation of a detailed model of an inverter-driven motor switching at 10 kHz, and it is shown that transients up to the switching frequency are accurately captured.