Certification of a mono or multicore processor is going to request to demonstrate that we are capable of mastering the determinism of the execution of all the applications which are going to be executed. Regarding the multicore we introduce a level of complexity to be managed regarding the execution of the application in parallel on each of the cores of the multicore processor whatever is the internal architecture of the processor. In an IMA context, in a mono-core processor: • This determinism is insured by the control of the WCET allowing defining a maximal boundary for all the accesses to all the services offered by the Operating System. • The Platform Provider has no information about the applications which are going to be executed. In this condition the computation of a WCET on a multi-core, like it is done currently, will be realized by introducing constraints at the level of the internal functioning of the multi-core processor. Our approach is to combine both WCET and MAF (and or MIF) spare time in order to manage the execution of all the application, in parallel, on a multi-core, safely. It is what we propose to address in our paper and present during the conference.